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FPGA core board, features the ALTERA Cyclone IV chip EP4CE6E22C8N onboard

Overview


CoreEP4CE6 is an FPGA core board that features an EP4CE6E22C8N device onboard, supports further expansion.



  • onboard Serial Configuration Device EPCS16SI8N

  • integrated FPGA basic circuit, such as clock circuit

  • onboard nCONFIG button, RESET button, 4 x LEDs

  • all the I/O ports are accessible on the pin headers

  • onboard JTAG debugging/programming interface

  • 2.54mm header pitch design, suitable for being plugged-in your application system




What's On Board


EP4CE6E22C8N core board on board resource

  1. EP4CE6E22C8N:the ALTERA Cyclone IV FPGA device which features:

    • Operating Frequency: 50MHz

    • Operating Voltage: 1.15V~3.465V

    • Package: QFP144

    • I/Os: 80

    • LEs: 6K

    • RAM: 270kb

    • PLLs: 2

    • Debugging/Programming: supports JTAG



  2. AMS1117-3.3, 3.3V voltage regulator

  3. AMS1117-2.5, 2.5V voltage regulator

  4. AMS1117-1.2, 1.2V voltage regulator

  5. EPCS16, onboard serial FLASH memory, for storing code

  6. Power indicator

  7. LEDs

  8. Reset button

  9. nCONFIG button: for re-configuring the FPGA chip, the equivalent of power reseting

  10. Power switch

  11. 50M active crystal oscillator

  12. 5V DC jack

  13. JTAG interface: for debugging/programming

  14. FPGA pins expander, VCC, GND and all the I/O ports are accessible on expansion connectors for further expansion

  15. LED jumpers



Photos


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Note:
CoreEP4CE6 provides JTAG debugging interface, yet does NOT integrate any debugging function, a debugger is required.
Mother board and programmer/debugger in the photos are NOT included in the price.




JTAG Interface


The figure below shows the header pinout of JTAG



Figure 1. JTAG Header Pinout
JTAG Header Pinout




Development Resources


CoreEP4CE6 FPGA core board comes with a User Guide CD including development resources listed as below:



  • Related software (Quaters II, NIOS II etc.)

  • Demo code (Verilog, VHDL, NIOS II C)

  • Schematic (PDF)

  • FPGA development documentations


Wiki: www.utsource.net/wiki/CoreEP4CE6



 




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